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Renesas says new mobile phone chip is ready for Linux

May 24, 2004 — by LinuxDevices Staff — from the LinuxDevices Archive

Renesas has announced a new mobile phone processor with the power to run a general purpose operating system — such as embedded Linux. Renesas says the new SH-Mobile3 chip is more than twice as powerful as previous SH-Mobile processors, and includes a camera interface, sound, graphics processing, and more.


The SH-Mobile3 chip uses Renesas's new SH4AL-DSP CPU core, the instruction set of which is upwardly compatible with the cores used in previous SH-Mobile chips. The core features a new superscalar technology supporting simultaneous execution of two instructions, along with a seven-stage pipeline architecture.

The new core delivers 389 MIPS (millions of instructions per second) at its maximum clock speed of 216MHz (1.8 MIPS/MHz), a 2.3-fold increase over the current SH3-DSP core, which turns in only 173 MIPS at its max 133MHz clocking (1.3 MIPS/MHz).

SH-Mobile3 features

In addition to the new high-performance core, the SH-Mobile3 provides a camera interface to a 3-megapixel camera module and a video output unit for connection to a TV set. It supports high-speed capture of large-volume images, electronic zooming, super-imposed images, and moving picture output to TV, according to Renesas.

To support gaming, video-mail, and video-phone functions, the new chip includes a PowerVR MBX Lite IP 2D/3D graphics engine from Imagination Technologies, as well as an MPEG-4 hardware accelerator.

Renesas lists the following specifications for the SH-Mobile3:

  • Power supply voltage: Internal: 1.1 V to 1.3 V
  • External: 2.5 V to 3.3 V or 1.65 V to 1.95 V
  • Maximum operating frequency: 216 MHz
  • Maximum processing performance: 389 MIPS (at 216MHz operation)
  • On-chip RAM: 256 Kbytes
  • Cache memory: 4-way set associative type, with separate 32 Kbytes for instructions and 32 Kbytes for data
  • X/Y memory (for DSP): 16 Kbytes
  • On-chip peripheral functions:
    • 3-megapixel camera support functions
    • MPEG-4 full hardware accelerator
    • 2D/3D graphics engine
    • DMAC × 6 channels
    • MMU
    • Video output unit
    • LCD controller supporting TFT color liquid crystal display
  • Interfaces
    • Dedicated interface (baseband LSI connection, etc.)
    • NAND/AND flash memory interface
    • Video I/O (direct camera module connection interface)
    • I2C interface
    • Synchronous serial interface
    • Serial interface with FIFO
    • Asynchronous serial interface
    • Sound interface unit x 2 channels
  • Package 409-pin CSP (12 x 12 x 1.4 mm, 0.5 mm pin pitch)

Pricing and availability

The SH-Mobile3 is expected to ship in July, 2004, priced at 4,000 Yen in lots of 10,000.

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