This year's Fall Microprocessor Forum will focus on advances in power-efficiency. The event, which will take place in San Jose, Calif. on Oct. 10 and 11, will feature over 22 presentations and keynotes, including many introductions of new processors and processor cores, according to conference organizer In-Stat.
Keynote talks will be delivered by Dr. Dileep Bhandarkar, Architect-at-Large for Intel's Digital Enterprise Group; Ted Vucurevich, CTO of Cadence Design Systems; John Cornish, VP of the Processors Division at ARM Ltd.; and Kurt Kennett, development lead for Windows CE drivers at Microsoft.
Preceding the forum on Monday, Oct. 9, is a full-day seminar, “Maximum Performance, Minimum Power,” addressing issues of performance, power consumption, and heat dissipation in both mobile and fixed systems. In this session, representatives from AMD, Cadence, CoWare, Nextreme Thermal Solutions, and Texas Instruments will offer technical tutorials on design tools and techniques for achieving the best combination of power consumption and integration, according to In-Stat.
“Early bird” registration with discounts of up to $600 are being offered until Sept. 8. Further details on various attendance packages are available here.
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