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DSP-free multimedia SoC uses new SuperH core

Aug 13, 2004 — by LinuxDevices Staff — from the LinuxDevices Archive

Renesas is readying a SuperH system-on-chip (SoC) powerful enough to process multimedia on systems without dedicated DSPs (digital signal processors). The SH7780 will use a new SH-4-compatible core and feature three buses and an improved cache architecture. It will target car navigation systems, game machines, and digital home electronics products.

Systems based on a single RISC core rather than combined RISC/DSP cores reduce system design complexities, save money and board space compared with multi-chip solutions, and typically draw less power.

The SH7780 will use a new SH-4A core, which has an instruction set said to be upwardly compatible with the older SH-4 core. The chip will support clock speeds up to 400MHz, and include a full-speed FPU (floating point unit) supporting single- and double-precision arithmetic.

According to Renesas, the SH7780 will deliver up to 720 MIPS (millions of instructions per second) and 2.8 GFLOPS (giga-floating point operations per second) (single-precision mode), enough power to process speech recognition and synthesis. The chip will additionally include hardware support for sine/cosine arithmetic operations, useful for high-speed rendering of 3-D graphics and DSP calculations.

Renesas claims the SH7780 will deliver an improved cache hit ratio, compared with older SoCs based on the SH-4 core, thanks to a four-way, set-associative memory cache that provides 32KB for instructions and 32KB for data. The chip also includes 16KB of high-speed on-chip RAM to store exception handling routines.

The SH7780 employs three dedicated external buses:

  1. 32-bit, 160MHz DDR (double data rate) SDRAM bus (DDR-SDRAM320)
  2. 32-bit bus for PCI bus connections
  3. 32-bit local bus at 100MHz for connecting to flash memory, SRAM, ATAPI (advanced technology attachment packet interface) and PCMCIA

The SH7780's PCI controller (PCIC) makes it possible to connect the microprocessor to a PCI bus, the type of general purpose bus commonly used in PCs. Moreover, the PCIC supports the PCI Rev. 2.2, allowing connections with LSI devices incorporating a PCI interface and operating at either 66 MHz or 33 MHz. This makes it easy to make connections with graphic chipsets or low-cost external devices such as PC peripherals, Renesas says.

Summary of the long list of functions and peripheral interfaces:

  • CPU – Superscalar 32-bit SH-4A RISC
  • FPU
  • MMU
  • Cache
  • interrupt controllers
  • timing controller
  • DDR-SDRAM controller
  • PCI bus controller
  • DMA controller
  • real-time clock
  • dual async serial ports
  • one synchronous serial port
  • Multimedia Card controller
  • audio interface
  • NAND flash controller
  • SRAM interface
  • PCMCIA interface
  • debug interface.


The SH7780 will begin sampling in November, in a 449-pin BGA (ball-grid array) package measuring 21 x 21mm with Renesas part number R8A77800NBC. Pricing has not yet been set.

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